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Critical Conduction Power Factor Corrector
One of the limitations of the boost converter topology is the output rectifier
diode. The diode must have a high enough voltage rating to support the output
voltage and is abruptly switched with the output current flowing through it.
This leads to a very high loss in both the rectifier and the Mosfet switch.
Process technology is continuously improving these high voltage diodes; however
there is another option that is becoming more widespread. This is the critical
conduction boost power factor correction (PFC). The critical conduction boost
converter operates at the boundary of continuous and discontinuous operation.
This is achieved by using a zero crossing detector to determine the point at
which the inductor current is reduced to near zero. At this point the Mosfet
can be turned on without a recovery effect in the output rectifier, significantly
reducing the losses in both the Mosfet and the diode. Critical conduction PFC
controllers are presently available from several manufacturers. One of the most
popular is the MC33262 from ON Semiconductor.
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| Figure 1. Error Amp Transconductance and Phase Test Fixture |
The MC33262 uses a current mode topology to regulate the output voltage and correct input signal power factor.
The controller has an error amplifier. The output voltage of a preconverter is feedback to the amplifier inverting input and compared to a 2.5Vinternal reference voltage source connected to non-inverting input of the amplifier. The error amplifier output and the converter input voltages are multiplied. The product controls the converter input peak current threshold and ON time and then regulates the output voltage. The product also corrects the power factor by forcing the input current directly proportional to the input voltage.
Once the inductor current feedback to the controller current sense input pin exceeds the threshold current, the output driver is off, and the off time is a function of the inductor zero current crossing. The inductor voltage is feedback to the MC33262 zero current detect input. When the inductor voltage changes polarity during the off time, the controller’s internal RS flip-flop latches on. However, if the output driver has been off for more than 620us after the inductor current has been less than or equal to zero, the controller has a built in watchdog timer that automatically latches the flip-flop on thereby turning on the controller output driver.
A PSpice model, included with the Power IC Model Library product, was created and tested with the results correlated to the actual data points. The PSpice test fixture and results for the error amp transconductance and phase is shown in figures 1 and 2. The results were correlated to the specification data points shown in figure 3.
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| Figure 2. Error Amp Transconductance & Phase vs. Frequency Plots |
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| Figure 3. Error Amp Transconductance & Phase of Actual Data Plots |
The MC33262 model was also tested
in the critical conduction mode boost PFC application circuit shown in figure
4. Many of the models in the Power IC Model Library include example application
circuits such as this. The output waveforms are shown in figure 5. Table 1 shows
the correlation of the model to the several key data sheet parameters.
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| Figure 4. 230V/0.35A PSpice model of a critical conduction mode boost PFC. |
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| Figure 5a. Critical Conduction Boost Waveforms. |
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| Figure 5b. Critical Conduction Boost Waveforms |
Table 1. Specifications vs.
Simulation, MC33262 |
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| * Note: distortion accuracy could be improved with better board parasitic correlation |
Boost Mode Power
Factor Corrector
One of the most popular PFC topologies is the boost topology. The most popular
controllers for boost PFC circuits are the UC3854 series of high power factor
preregulators, manufactured by Texas Instrument.
While several attempts have been made to model the UC3854, we have not seen any non-state space transient SPICE models available for this device that function properly and give the right answers. Many, from other EDA vendors, have been checked and found to be inaccurate. The overall complexity of the device and the nature of its operation, which results in very long simulation times at a fairly high switching frequency rate complicate the verification and accuracy concerns. The need to simulate for multiple periods results in a very large number of transient iterations/calculations.
The model used in the figure 6 simulation is a state space average model, included in the Power IC Model Library for PSpice. The library was generated by AEi Systems (www.aeng.com, info@aeng.com) experts in the field of SPICE modeling. Even though the model uses state space techniques you can perform many types of transient analyses with it. Figure 7 shows the steady state input voltage, current, power, and total harmonic distortion.
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| Figure 6. Transient (Steady State) simulation of a boost power factor corrector circuit using a state space model of the UC3854. |
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Modeling Intensive
The SPICE modeling and verification process used for the PSpice models in the
Power IC Model Library product follows a pattern. First the overall structure
of the IC is reduced to subcircuit modules that represent individual function
blocks.
While the SPICE model does not reveal proprietary structures or parameters it is essential to consider information beyond the scope of the device’s data sheet in order to model key functions such as the error amp, output driver, slope compensation, and other functions.
In most cases, development of models based solely on manufacturer data sheet information results in inaccurate and erroneous operation. This is the approach used by most other EDA vendors. Models might be correct under certain specific conditions or operating points but not for general usage over the entire operating range. The models in the Power IC Model Library, on the other hand, were developed using information that goes beyond the data sheet including bench testing.
Once the proprietary information is understood, the data is mapped to topological structures that perform the various operations efficiently and accurately. This is one of the reasons why it’s critical for the engineer that is creating the model to be familiar with the circuit application, the part’s operation, and SPICE syntax.
Lastly, additional models are constructed for parts used in the application circuit such as FETs, diodes, and passive components.
Verification is
the Key
The IC under development is simulated using start-up, steady state, line transient,
load transient, and frequency response in a typical applications circuit arrangement.
The simulation data for key parameters (output voltage ripple, inductor current,
etc.) is compared with data gathered from comparable tests made in the laboratory
using oscilloscope and simulation waveform overlays. This process assures that
operation at the typical, as well as the maximum input/load specifications is
accurate.
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