The Cadence® Virtuoso® custom design platform is a comprehensive system that enables design teams to deliver silicon that meets all specifications, while also meeting their schedules. It includes a specification-driven environment, multi-mode simulation, accelerated layout, advanced silicon analysis, and a full-chip integration environment.
Virtuoso custom design platform L provides an entry-level configuration of the industry's leading design system for complete front-to-back analog, RF, mixed-signal, and custom digital design. It includes Virtuoso Schematic Editor L for design entry, Virtuoso Analog Design Environment L for full simulation and analysis of design, and Virtuoso Layout Suite L for accelerated physical layout.
Virtuoso custom design platform XL extends the Virtuoso L platform to provide higher levels of design assistance to the end user. It speeds-up common design tasks by more than 5x over the Virtuoso platform L methodologies by using constraint- and schematic-driven physical implementation, and other enhancements.
Virtuoso custom design platform GXL delivers the most advanced capabilities, including expanded physical design features and an improved simulation environment by providing enhanced analog analysis and advanced chip finishing.
Cadence Virtuoso Multi-Mode Simulation is a comprehensive design and verification solution that combines the industry's leading SPICE, FastSPICE, RF, and mixed-signal simulators in a unique shared licensing scheme. It meets the changing simulation needs of designers as they move through the design cycle, from architecture exploration to block-level development to RF design and to final full-chip verification. Virtuoso Multi-Mode Simulation contains:
- Cadence Virtuoso Spectre® Circuit Simulator provides fast, accurate SPICE-level simulation for tough analog, RF and mixed-signal circuits.
- Cadence Virtuoso UltraSim Full-Chip Simulator is the Cadence FastSPICE circuit simulator that provides speed, capacity, and accuracy when verifying large custom, analog mixed-signal, RF, memory, and SoC designs.
- Cadence Virtuoso AMS Designer Simulator is a mixed-signal simulation solution for the design and verification of analog, RF, memory and mixed signal SoCs. It is also integrated into the Incisive functional verification platform for mixed signal verification within the digital verification environment.
Cadence Assura® Design Rule Checker (DRC) is a full-featured tool that supports both interactive and batch operation modes and utilizes hierarchical processing for fast, efficient identification and correction of design rule errors in even the most advanced designs.
Cadence Assura Layout vs. Schematic (LVS) ensures that the layout connectivity of the physical design matches the logical design represented by the schematic or netlist. Assura LVS provides fast, efficient verification in both interactive and batch mode.
Cadence QRC Extraction is the industry's premier 3D full-chip parasitic extractor for fast and accurate implementation and validation of complex designs. Cadence QRC Extraction includes a full spectrum of technologies for all nanometer-scale design styles including RF, analog, mixed-signal, custom digital, and cell.