Blog

Tutorials, news, snippets, and other various musings about the electrical engineering industry.

Open Compute Project; A Look Under the Hood with PCB Design Expert Robert Feranec

Have you ever looked at a board designed by someone else and wondered, how or why certain decisions were made (good or bad)? What prompted these decisions? Why were some design choices made over others? It’s not often designers are given peer-review opportunities to have questions like these answered, unless they were able to find a seasoned mentor.
 

Finding a mentor is not always a simple task, but anyone who has utilized one knows they are worth the effort. With a mentorship, the lessons shared through years of experience is an invaluable resource in helping you put your career on the right path.
 

If you haven’t found your Obi-Wan (not to say you are destined for the dark side if you have), or are looking for answers to board design questions, you’re in luck. In the six-part series reviewing the open source, Open Compute server board design, Robert Feranec, educator and veteran engineer, gives viewers “a look under the hood”, providing you with some insight one might get from a one-on-one mentorship.
 

Feranec walks through the board and analyzes what and why specific design decisions were made. His review provides valuable insight into hot-button topics and challenges designers typically face such as managing route density and solving for high-speed design issues. This series provides detailed information as Feranec walks through the design process, allowing the viewer to fully appreciate the thought process behind the final layout. He also gives deep insight into the practical applications for various design decisions.

Project Olympus Server


Each video dives into detailed information that will lead to success in scalable computing:

Part one addresses the review of processor schematic.

Part two explains platform controller hub (PCH).

Part three defines the importance of baseboard management controller (BMC).

Part four dissects PCI Express (PCIE).

Part five goes into depth about SFP 10 Gb/s interface.

Part six rounds out with the importance of DDR4 memory layout and CPU power.


Since this is an open source board you can ‘follow along at home’ by simply downloading the design files here. This design was done in OrCAD and Allegro meaning existing Cadence users can simply open the files up and have a look. For those that do not have Cadence you can download the free trial and use that to improve your PCB design knowledge.


Throughout the series, Feranec’s interest and excitement shows through his knowledge of the subject. He also has the career experience as a seasoned motherboard expert to back it up.


About Robert Feranec


In the year 2000, Feranec received his master’s degree in electronics at the Slovak Technical University in Bratislava at the Faculty of Electrical Engineering and Information Technology. After graduating, he continued studying for a PhD until 2002. Between the years 2002 - 2005 he worked as a Hardware Design Engineer at VOIPAC, Slovak Republic. From 2005 to 2010 Robert lived in Cambridge, UK and worked as a Senior Hardware Design Engineer at Arcom, later known as EUROTECH Ltd. In 2010, he returned to the Slovak Republic and in 2013, he started FEDEVEL. Currently, Feranec is living in California, US and his focus is teaching online and sharing his experience through his online courses, workshops, presentations, YouTube and his blog.


All Feranec’s courses are based on real projects. Everyone has the opportunity to practice and learn on real printed circuit boards. Feranec has led and supported the development of several Open Source boards used in his courses. He has also committed time and effort into the Open Compute Project.


To learn more about Robert Feranec check out the following links: 

YouTube Channel: https://www.youtube.com/robertferanec

Blog: https://www.fedevel.com/welldoneblog/


About the Open Compute Project


The Open Compute Project is a growing community of engineers around the world whose mission is to design and enable the delivery of the most efficient server, storage, and data center hardware designs available for scalable computing. Their mission is to maximize innovation and reduce operational complexity in the scalable computing space. They stand by spurring rapid innovation, “We believe that openly sharing ideas and specifications is the key to maximizing innovation and reducing operational complexity in the scalable computing space.”


Are there other educators like Robert you follow? Other design reviews you think would be useful to broader community? Tell us about them in the comments below.