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17.2-2016 Allegro PCB High Speed Enhancements

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Enhancements discussed in this video include:

 

 

Tabbed Routing

Shrinking pin pitches are forcing narrower than usual trace widths. Coupled with an increasing number of pins on BGAs, single-ended and differential pair signals have to meander through the pin fields, often with arcs. Pin fields on large-pin-count devices are by nature full of voids on the reference plane, making it harder to control impedance on critical signals. The result is a higher impedance than desired on critical signals. Tabbed routing is a new routing strategy in which trapezoidal shapes called tabs are added to parallel traces to control impedance in the pin-field/breakout region and crosstalk in the open-field region. This method enables longer trace lengths and use of smaller trace spacing. Tabbed routing is used for impedance control and to manage crosstalk in critical signals, enhancing signal quality and improving route channel utilization. The Allegro PCB Designer High-Speed Option enables tabbed Route Generation, Tab Count Validation, Tab Pitch Validation, Manage/Delete Tabs when traces are edited.

 

 

 

Return Path Management Through Custom Via Structures

Allegro PCB High-Speed Option introduced six via structures for managing return path for critical differential signals during Add Connect in the Allegro 16.6-2015 release. 

 


The Allegro 17.2-2016 release enhances the ability to add return path via structures during Add Connect by allowing users to use custom return path via structures. These via structures can be fine-tuned and verified using Sigrity technology, ensuring that right return path via structures are used in the design and shortening the time to verify that a design meets performance criteria for critical high-speed signals. 

 


The Create Via Structure feature allows you to create two types of via structures: standard and high speed. There is also an option available to automatically export an XML file, which can be used to import/export via structure definition in other PCB/SiP database and Sigrity technology.

 

  • Standard Via Structure: The Target Use Model is single net trace/via structure and fan-out.
  • High Speed Via Structure: The Target Use Model is differential pair via transitions with Return Path Vias and custom plane voids.

 

 

 

 

Add Connect and Slide

Add connect and slide have been enhanced to better support arc routing and editing including new options to the bubble settings to truly model arc and circular obstacles.

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