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Posted on Jan 10, 2017
Like many companies selecting OrCAD, you have existing or legacy designs you need to convert or translate into OrCAD. The good news is that OrCAD is supplied with an integrated and proven Eagle design translator built in. This guide will walk you through the steps and process involved in getting your design IP into the OrCAD format so you can start realizing the advantages of moving to OrCAD!
Posted on Jun 10, 2016
Reference document describing the tcl/tk API commands available to users
Posted on May 11, 2016
See how easy it is to trade-up to OrCAD from PADS with our built-in design and library translators and this comprehensive migration guide.
Posted on Apr 18, 2016
This quick reference guide describes the capabilities and limitations of the free OrCAD Lite software.
Posted on Apr 12, 2016
Allegro® FPGA System Planner offers a simplified and more flexible approach to ASIC Prototyping.
Posted on Sep 28, 2015
TimingDesigner from EMA Design Automation has many powerful features that allow a multitude of timing and verification issues to be analyzed.
Posted on Sep 28, 2015
Using TimingDesigner to generate SDC for development of FPGA designs.
Posted on Sep 28, 2015
TimingDesigner 9.2 now provides integration with Allegro PCB SI to aide in more accurate timing analysis.
Posted on Sep 28, 2015
Using TimingDesigner® to generate SDC for development of Altera® FPGA designs.
Posted on Sep 28, 2015
A listing of the models in release 4.2 of the library.

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