Posted on Apr 6, 2017
CDNLive Silicon Valley brings together Cadence® technology users, developers, and industry experts for two days of networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems.
Posted on Mar 14, 2016
The Cadence® OrCAD® FPGA System Planner addresses the challenges that engineers encounter when designing large-pin-count FPGAs on the PCB board—which includes creating the initial pin assignment, integrating with the schematic, and ensuring that the device is routable on the board. By replacing manual, error-prone processes with automatic pin assignment synthesis, this unique placement-aware solution eliminates unnecessary physical design iterations while shortening the time required to create optimum pin assignment.
Posted on Apr 22, 2015
Highlights: Latest release marks 30th anniversary of OrCAD innovation and product design, new products offer seamless product integration, more comprehensive fabrication checks and simplified documentation methods and key feature updates focused on more interactive routing capability and additional high-speed design qualities.