TimingDesigner

TimingDesigner
TimingDesigner is the interactive timing analysis tool designers trust to deliver fast and accurate results for timing critical designs such as high-speed, multi-frequency designs.

TimingDesigner uses an intuitive timing diagram approach for developing specifications to drive the design process, analyzing timing to answer critical design questions, and documenting results to clearly illustrate and communicate the design implementation. Timing Designer is ideal for high-speed, multi-frequency designs. In these designs it is essential to accurately model and analyze signal relationships between devices on a board or between embedded functions on an ASIC or programmable IC. Timing Designer can evaluate comprehensive sets of timing alternatives and provide direction to the most complex of timing challenges, enabling designers to manage and monitor timing margins through the design process.

Benefits:
  • Easy-to-use timing diagram editor enables rapid specification of design requirements
  • Dynamically linked timing spreadsheet for accurate modeling of complex delay and constraint effects
  • Powerful timing analysis engine quickly identifies worst-case timing margins 
  • Instant updates of intelligent timing diagrams support quick evaluation of design alternatives
  • Robust project manager 
  • Extensive import/export support

 		  Next: Features
TimingDesigner® is the interactive timing analysis tool designers trust to deliver fast and accurate results for timing critical designs such as high-speed, multi-frequency designs.
Quickly Evaluate Alternatives
Evaluating alternatives is key to developing specifications that can accurately convey design details and timing budgets.
Analyze Interfaces
Interfaces between embedded processors, memory, and logic functions on a chip or between devices on a circuit board are often the source of...
Document
TimingDesigner delivers the ability to clearly and accurately communicate design details by exporting or linking timing diagram files...
Advanced Delay Path Analysis
TimingDesigner traces all delay paths specified in the timing diagram, removes common uncertainties, adjusts for track delays, selects critical paths,...

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See what our customers and partners have to say about us


GSI Technology:
"GSI Technology is proud to provide our customers with TimingDesigner® models for our SigmaQuad family of SRAM products."

- David Chapman, GSI Technology, Inc.
  Vice president of Marketing and Applications Engineering at GSI



Altera:
"Altera works closely with the EMA development team to enable a tight, seamless interface between our Quartus II software and TimingDesigner. As a result of this effort, customers can leverage the graphical timing analysis features of TimingDesigner to rapidly develop their SDC timing constraints for Altera devices."
 
- Chris Balough, Altera Corporation
  Senior Director of Software



Fujitsu Telecommunications
"The new TimingDesigner interface with Cadence Allegro PCB SI allows me to accomplish in 20 minutes what used to take 3 days. Because of this, I have my entire team using TimingDesigner."

- Bryn Holmes,
  Fujitsu Telecommunications Europe Ltd.
  Principal Design Engineer - Hardware Engineering



Simtek Corporation:
"After realizing the value that is gained by using TimingDesigner in our own internal development environment, it was a natural progression to see the benefits Simtek customers can realize with TimingDesigner and interactive timing models of our devices." 

- Grant Hulse, Simtek Corporation
  Vice President of Worldwide Marketing



Cadence Design Systems
“Merging simulator-derived interconnect delay data into timing tools has previously been a manual and error-prone operation.  With this integrated environment [between TimingDesigner and Cadence Allegro PCB SI], engineers can now combine the accuracy of simulation with an interactive, comprehensive timing diagram solution to quickly determine if today’s shrinking timing margins are in spec.”

- Brad Girffin Cadence Design Systems
  Product Marketing Director

Prev: Features 		  Next: Multimedia
DescriptionType
Learn what TimingDesigner Design Kits are and how they help you work more efficiently.
Video
Watch a short video demonstrating the interface analysis capabilities in TimingDesigner.
Video
An introduction to the interactive timing analysis and graphical interface of TimingDesigner accompanied by a short demonstration.
Video
TimingDesigner® is the interactive timing analysis tool users trust to deliver fast and accurate results for timing critical designs.
DataSheet (PDF)
This overview introduces the key features in TimingDesigner, the leading interactive timing specification and analysis tool used for timing-critical designs.
DataSheet (PDF)
Using TimingDesigner® to generate SDC for development of Altera® FPGA designs.
Application Note
TimingDesigner 9.2 now provides integration with Allegro PCB SI to aide in more accurate timing analysis.
Application Note
Using TimingDesigner to generate SDC for development of FPGA designs.
Application Note
Integrating EMA TimingDesigner with Xilinx and Altera Development Systems.
Application Note
It’s a given – the ever-increasing demand to get your designs to process more information in less time. Designing with new high-speed technology helps you meet market demands, but it’s likely you’re also encountering difficult interface design challenges.
Application Note
A step-by-step guide to solving QDR memory data capture challenges with Virtex-II FPGAs.
Application Note
TimingDesigner from EMA Design Automation has many powerful features that allow a multitude of timing and verification issues to be analyzed.
Application Note
A short video about drawing basic TimingDesign diagrams.
Video
A short video about drawing basic timing diagrams.
Video
An introduction to TimindDesigner.Timing challenges addressed for interface design.
Video
Licence option FLEX license manager
Video
Floating lincense configuration. Configure each machine intened for use.
Video
Purchased and Evaluation licences. Installing port drivers for FLEXid keys.
Video
License options Node-Locked
Video
Drawing Basic Timing diagrams clocks,signals, and buses.
Video
Drawing Basic Timing diagrams.
Video

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