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In the meantime, please take a look our latest design articles and videos

Blog
Multi-layer PCBs with high speeds require careful attention to the PCB layer design

PCB Layer Alignment Design Guidelines

Master PCB layer alignment and PCB layer design: learn labeling, stacking stripes, tooling holes, and fiducials for precise multilayer PCB registration.
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On-Demand Webinars
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Sigrity X: Reimagining Simulation Driven PCB Design

Join the experts at EMA as we provide an overview into Sigrity X and show how easy it is to make simulation driven design a part of your design flow.
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Blog
Following differential pair routing guidelines is essential for good signal quality for intraboard communications like PCIe slots

Essential Differential Pair Routing Guidelines

Knowing and following essential differential pair routing guidelines is critical to leverage the benefits of this routing technique.
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On-Demand Webinars
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Thermal Implications of Flip-Chip Technology for mmWave MMIC Amplifier Designs

This webinar delves into the thermal and RF performance of flip-chip technology in mmWave monolithic microwave integrated circuit (MMIC) amplifiers with a particular focus on K-band satellite downlink phased array applications. Flip-chip technology offers a compact packaging solution with high interconnect density and improved signal integrity.
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On-Demand Webinars
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High Speed Layout in OrCAD X – It’s Simpler Than You Think!

This 1-hour webinar will discuss efficient high-speed design practices that new and experienced users can utilize to tackle specific signal integrity challenges. We will demonstrate key features used for high-speed routing and the in-design analysis capabilities within OrCAD X Presto PCB Editor for post-layout verification.
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On-Demand Webinars
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Cadence TECHTALK: Enabling RF and MMWave Design Success with Adv Models

This webinar will discuss how to use Modelithics' advanced models in conjunction with Cadence Microwave Office and Clarity solutions. These tools make it possible to achieve first-pass design success and lower design costs.
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