With today’s sensitive, high-speed, and relatively high-power ICs, maintaining power integrity from source to sink is essential. Decoupling capacitors are a common and effective solution but must be placed sufficiently close to the required pins on the appropriate components. If a capacitor is placed too far, high loop inductance and poor power delivery result.
When placing components with X AI, component associations can be defined to ensure decoupling capacitors and other critical passive components stay close to their associated ICs and keep the power delivery network stable. A component association file is a spreadsheet driven (.csv) option designed to override the AI engine with user-driven guidance, such as when multiple capacitors of varying frequency ranges are assigned to a device pin.
This quick how-to will provide step-by-step instructions on how to define a component association table with X AI in OrCAD X.
To follow along, download the provided files above the table of contents.
How-To Video
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Creating an X AI Workspace
Step 1: Open the provided design in OrCAD X.
Step 2: Select Tools > X AI from the menu to activate the X AI panel.
Step 3: Select Login. Log in with your Cadence ID and password.
Step 4: Select the plus sign to add a new workspace.

Step 5: Enter a name for the workspace and click the checkmark to create it. The new workspace opens automatically.
Step 6: Select Upload Board to upload the loaded board to the workspace.
Configuring the Workspace
Step 7: Component classes, class-class spacing, and DC nets must be configured before component associations are defined. Select Setup Component Classes to define component classes.

Step 8: Allegro X AI has identified a reference designator in the design that is not included in the component class definition. Add |Q.* to the IC field to classify transistors as ICs. Click Save.
Note: For more information on defining component classes, see our how-to here.
Step 9: Select Class to Class Spacing to define spacing.

Step 10: Enter 0.254 under Clearance to define a clearance of 0.254mm. Select Autofill Classes to auto-generate all class pairs, then click the checkmark to automatically apply the clearance to each pair. Click Save.
Step 11: Select Identify DC Nets to define DC nets.

Step 12: DC voltage values have already been configured for this design in the constraint manager; therefore, the nets and voltages are automatically populated in Allegro X AI. Confirm that the voltages match the table shown and click Save.
Note: For help defining DC voltages for nets in your PCB design, get step-by-step instructions here.
Running Placement Without Component Association
Step 13: Select Run X AI to start component placement.
Step 14: When placement finishes, select the Download button in the X AI panel to view the results.

Step 15: View the results. Zoom in to view capacitor placement around U4. While the smoothing capacitors are reasonably close to pins on the same power net, some of these pins are connected to power for pullup and do not need smoothing capacitors.
Step 16: To return to the original board, select File > Open from the menu and select the board hdmi_dac.brd file in the working directory. If prompted to save changes to the new board, click No.
Creating a Component Association File
To improve the decoupling capacitor placement a component association file can be created and included in the Allegro X AI setup.
Step 17: Component associations are defined in CSV tables. Open a spreadsheet editor such as Microsoft Excel or LibreOffice Calc.
Step 18: The component association should contain critical information for each association. Enter Net, D-Cap, Device, and Pin as the headings in the first row.
Note: This is the order in which each row of the association table must be formatted. The “Net” column does not require an input and can be left blank.
Step 19: Copy and paste the following table into the subsequent rows.
| Net | D-Cap | Device | Pin |
| +DVDD | C11 | U4 | 38 |
| +DVDD | C12 | U4 | 67 |
| +OVDD | C15 | U4 | 29 |
| +OVDD | C16 | U4 | 43 |
| +OVDD | C17 | U4 | 57 |
| +OVDD | C18 | U4 | 78 |
| +AVDD | C13 | U4 | 84 |
| +AVDD | C14 | U4 | 95 |
| +PVDD | C19 | U4 | 97 |
Step 20: Save the file in the working directory with a .csv extension. Close the spreadsheet editor.

Note: Ensure the field delimiter is set to the comma (,).
Assigning Component Associations in Allegro X AI
Step 21: Back in OrCAD X, select Component Associations in the X AI workspace.

Step 22: Select Choose File under Component Associations to assign the file.
Step 23: Browse to and select the CSV file saved in the previous section. Click Open to assign the table.
Step 24: Click Close to return to the X AI workspace.
Running the X AI Placement
Step 25: Select Run X AI to run component placement.
Step 26: When placement finishes, select the Download button in the X AI panel to view the results.

Step 27: View the capacitor placement around U4. Each pin defined in the table has a decoupling capacitor placed in an optimal location.
Wrap Up & Next Steps
Quickly and easily define component associations to improve AI-generated component placement and ensure stable power and signal integrity with Allegro X AI in OrCAD X. Learn more about X AI here
and get more how-tos for OrCAD X at EMA Academy.
