Cadence PCB & System Analysis

PARALLEL BUS ANALYSIS
Realistic, Power-Aware Simulation and Verification

Easily verify your DDR design functions as intended and complies with the standards required for each new technology, like BER Analysis and DQ Mask Compliance for DDR4. Combat shrinking design margins for jitter and noise with realistic power-aware simulation and verification in Sigrity.

• Full Channel Analysis
• Eye Diagram & Eye Mask Analysis
• BER and Bathtub Curve
• Jitter analysis
• IBIS-AMI 
• SSN and crosstalk analysis
• Power-aware non-ideal power

On-Demand Webinar: DDR Design Guidelines

AC POWER INTEGRITY 
Optimize Your Power Delivery Network

Perform complete AC frequency analysis for your PCB and package IC’s to optimize your Power Delivery Network. Ensure your power delivery needs are met at the lowest possible cost with automated decoupling capacitor selection and placement. Analyze power delivery network tradeoffs and optimize your design. Easily meet target impedance, perform pre and post layout decap optimization, and check EMI resonance to verify complete functionality.

• Pre and Post-layout simulation
• PDN Impedance Checks
• Resonance Analysis
• Return Path Analysis
• Power Ripple Analysis
• Automated selection and placement of decoupling caps
• Analyze voltage distribution across ground planes
• Real-time visualization of PDN performance

Whitepaper: How a Team-Based Approach to PCB Power Integrity Analysis Yields Better Results (link is external)

DC POWER INTEGRITY
Prevent Board Failure

Analyze the success of your Power Delivery Network with IR Drop. Perform realistic voltage drop simulation and incorporate multiple power planes, splits, and vias to ensure appropriate voltage is supplied to components. Eliminate time spent troubleshooting hard-to-find errors in the lab and prevent board failure due to insufficient power.

• Electrical/Thermal co-simulation
• IR Drop Analysis
• Current Density Analysis
• Power Ripple Analysis
• Real-time visualization of PDN performance

Whitepaper: How a Team-Based Approach to PCB Power Integrity Analysis Yields Better Results (link is external)

THERMAL ANALYSIS
Easily Address Thermal Issues

Easily detect and resolve thermal issues in your design from IC’s to PCB enclosures. Celsius Thermal Solver combines finite element analysis (FEA) for solid structures with computational fluid dynamics (CFD) for fluids to easily analyze your entire design.

• Multi-Physics technology for complete system analysis
• Electrical/Thermal Co-simulation
• Transient and Steady State Analysis
• Finite Element Analysis (FEA)
• Computational Fluid Dynamics (CFD)
• Fast and Accurate analysis with parallel architecture

Technical Brief: Rising to Meet the Thermal Challenge

VIA AND STACKUP MODELING
Effortlessly Simulate and Optimze Vias and Via Arrays

Realistically simulate your design by including accurately modeled vias and stackups directly within the software. Include vital stackup information in your simulation to verify the effect on impedance and power delivery. Simulate and optimize vias and via arrays in your design with integrated 3D EM solvers.

• Incorporate stack up materials and information for accurate analysis
• Design and optimize via arrays

Conference Paper: Effects of Power/Ground Via Distribution on the Power/Ground Performance of C4/BGA Packages (link is external)

EM SOLVERS
Multiple EM Solver Engines Grow with Your Design Complexity

2D, Hybrid, or 3D integrated EM solver are available to meet your needs from individual packages to complete board simulation. Effortlessly model complex aspects of your designs, such as coaxial cables, antennas, rigid-flex boards, and more through EM Extraction. With the meshing process, the software automatically deconstructs your design into tiny pieces where approximations can be made without significant errors. Pieces are then reassembled to create a 2D or 3D model for accurate analysis. EM Solver Technology includes:

• Silicon extraction (redistribution layer and/or silicon interposer)
• Full package modeling
• Full PCB modeling
• High-fidelity and full-system interconnect modeling
  
  

Whitepaper: EM Analysis: Why, When, and What? (link is external)

S-PARAM MODELING 
Realistic Model Extraction

Build highly accurate and fast power-aware S-parameter models of PCI, DDR, and additional circuitry for realistic systems-level simulation. Analyze unique design parasitics and interconnects with customized models including decoupling capacitors and termination resistance. Quickly perform realistic model extraction guaranteeing your high-speed designs function as intended.

• Accurate S-Parameter modeling
• Power-Aware extraction
• Inclusion of decoupling caps and termination resistance
• Incorporate stack up for realistic simulation

Whitepaper: Addressing the "Power-Aware" Challenges of Memory Interface Designs (link is external)

RF SYSTEM DESIGN
On-Board RF System Design

Bridge the gap between component-level design and RF communication system development. Easily develop and optimize architectural design, budget and spur analysis, and component specification with impedance-aware behavioral modeling. Ensure compliance to popular communication standards with virtual test benches including pre-configured, modulated signal sources and measurements. Create accurate wireless communication and radar system designs with complete circuit and electromagnetic co-simulation.

• RF chain impairment analysis
• RFA RF system-level architectural planning tool
• Phased array (MIMO/beam-steering) generator tool
• EVM, ACPR, and phase-noise measurements
• Wireless communications standards testbenches

Whitepaper: Multi-band Active Antenna Tuner for Cellular IoT (link is external)