Cadence PCB & System Analysis
Electromagnetic, Electronics, Thermal, and Electromechanical Simulation Solutions
Industry-Leading Analysis Engines
Cadence Multi-Physics analysis.

Signal Integrity
Comprehensive pre- and post- layout SI analysis and verification (time and frequency domain).

Power Integrity
AC/DC and Electro-Thermal Analysis for full PDN characterization and optimization.

Thermal
Full system-level multi-physics thermal analysis with complete static, transient, CFD, and FEA.

EM Extraction
Multiple extraction engines for 2D, 2.5D, and full 3D extraction with unparalleled speed and accuracy.

SPICE Mixed Signal
Transient SPICE analysis for power supplies and mixed signal designs.

RF/Microwave
Complete RF and microwave design environment with 3D extraction and analysis.
Capabilities
Serial Link Analysis
SERIAL LINK ANALYSIS
Ensure Design Intent with Channel Simulation and Verification
Design your HDMI, PCI, and USB3 technology with confidence using serial link analysis and verification. Automatically compare various points in the simulation to the required regulations for your specific technology. Easily perform accurate channel simulation and verification to ensure design compliance.
- Full Channel Analysis
- Eye Diagram & Eye Mask Analysis
- Jitter analysis
- Bathtub curves
- IBIS-AMI
- Compliance Kits

Parallel Bus Analysis
PARALLEL BUS ANALYSIS
Realistic, Power-Aware Simulation and Verification
Easily verify your DDR design functions as intended and complies with the standards required for each new technology, like BER Analysis and DQ Mask Compliance for DDR4. Combat shrinking design margins for jitter and noise with realistic power-aware simulation and verification in Sigrity.
- Full Channel Analysis
- Eye Diagram & Eye Mask Analysis
- BER and Bathtub Curve
- Jitter analysis
- IBIS-AMI
- SSN and crosstalk analysis
- Power-aware non-ideal power
On-Demand Webinar: DDR Design Guidelines

AC Power Integrity
AC POWER INTEGRITY
Optimize Your Power Delivery Network
Perform complete AC frequency analysis for your PCB and package IC’s to optimize your Power Delivery Network. Ensure your power delivery needs are met at the lowest possible cost with automated decoupling capacitor selection and placement. Analyze power delivery network tradeoffs and optimize your design. Easily meet target impedance, perform pre and post layout decap optimization, and check EMI resonance to verify complete functionality.
- Pre and Post-layout simulation
- PDN Impedance Checks
- Resonance Analysis
- Return Path Analysis
- Power Ripple Analysis
- Automated selection and placement of decoupling caps
- Analyze voltage distribution across ground planes
- Real-time visualization of PDN performance
Whitepaper: How a Team-Based Approach to PCB Power Integrity Analysis Yields Better Results (link is external)

DC Power Integrity
DC POWER INTEGRITY
Prevent Board Failure
Analyze the success of your Power Delivery Network with IR Drop. Perform realistic voltage drop simulation and incorporate multiple power planes, splits, and vias to ensure appropriate voltage is supplied to components. Eliminate time spent troubleshooting hard-to-find errors in the lab and prevent board failure due to insufficient power.
- Electrical/Thermal co-simulation
- IR Drop Analysis
- Current Density Analysis
- Power Ripple Analysis
- Real-time visualization of PDN performance
Whitepaper: How a Team-Based Approach to PCB Power Integrity Analysis Yields Better Results (link is external)

Thermal Analysis
THERMAL ANALYSIS
Easily Address Thermal Issues
Easily detect and resolve thermal issues in your design from IC’s to PCB enclosures. Celsius Thermal Solver combines finite element analysis (FEA) for solid structures with computational fluid dynamics (CFD) for fluids to easily analyze your entire design.
- Multi-Physics technology for complete system analysis
- Electrical/Thermal Co-simulation
- Transient and Steady State Analysis
- Finite Element Analysis (FEA)
- Computational Fluid Dynamics (CFD)
- Fast and Accurate analysis with parallel architecture
Technical Brief: Rising to Meet the Thermal Challenge

Via and Stackup Modeling
VIA AND STACKUP MODELING
Effortlessly Simulate and Optimze Vias and Via Arrays
Realistically simulate your design by including accurately modeled vias and stackups directly within the software. Include vital stackup information in your simulation to verify the effect on impedance and power delivery. Simulate and optimize vias and via arrays in your design with integrated 3D EM solvers.
- Incorporate stack up materials and information for accurate analysis
- Design and optimize via arrays
Conference Paper: Effects of Power/Ground Via Distribution on the Power/Ground Performance of C4/BGA Packages (link is external)

EM Solvers
EM SOLVERS
Multiple EM Solver Engines Grow with Your Design Complexity
2D, Hybrid, or 3D integrated EM solver are available to meet your needs from individual packages to complete board simulation. Effortlessly model complex aspects of your designs, such as coaxial cables, antennas, rigid-flex boards, and more through EM Extraction. With the meshing process, the software automatically deconstructs your design into tiny pieces where approximations can be made without significant errors. Pieces are then reassembled to create a 2D or 3D model for accurate analysis. EM Solver Technology includes:
- Silicon extraction (redistribution layer and/or silicon interposer)
- Full package modeling
- Full PCB modeling
- High-fidelity and full-system interconnect modeling
Whitepaper: EM Analysis: Why, When, and What? (link is external)

S-Param Modeling
S-PARAM MODELING
Realistic Model Extraction
Build highly accurate and fast power-aware S-parameter models of PCI, DDR, and additional circuitry for realistic systems-level simulation. Analyze unique design parasitics and interconnects with customized models including decoupling capacitors and termination resistance. Quickly perform realistic model extraction guaranteeing your high-speed designs function as intended.
- Accurate S-Parameter modeling
- Power-Aware extraction
- Inclusion of decoupling caps and termination resistance
- Incorporate stack up for realistic simulation
Whitepaper: Addressing the "Power-Aware" Challenges of Memory Interface Designs (link is external)

RF System Design
RF SYSTEM DESIGN
On-Board RF System Design
Bridge the gap between component-level design and RF communication system development. Easily develop and optimize architectural design, budget and spur analysis, and component specification with impedance-aware behavioral modeling. Ensure compliance to popular communication standards with virtual test benches including pre-configured, modulated signal sources and measurements. Create accurate wireless communication and radar system designs with complete circuit and electromagnetic co-simulation.
- RF chain impairment analysis
- RFA RF system-level architectural planning tool
- Phased array (MIMO/beam-steering) generator tool
- EVM, ACPR, and phase-noise measurements
- Wireless communications standards testbenches
Whitepaper: Multi-band Active Antenna Tuner for Cellular IoT (link is external)

RF Design and Analysis
RF DESIGN AND ANALYSIS
On-Board RF Analysis
Optimize engineering productivity and accelerate high-frequency product development with RF-aware layout, high-frequency aware models, and a powerful harmonic balance (HB) simulator. Support all phases of product development and design challenging wireless in less time with design automation, an intuitive interface, and scripting/customization. Provide in-situ parasitic extraction, design verification, and standards-compliant communication test benches with Co-simulation with system and electromagnetic (EM) simulators.
- Synchronous schematic/layout design entry with industry-leading tuning
- Linear and nonlinear harmonic-balance circuit simulation
- EM Analysis
- Load-pull analysis with harmonic and video-band tuning
- Loop Circuit envelope analysis for stability
- Design Rule Checking for layout vs. schematic
Application Note: Multi-Chip Module Design, Verification, and Yield Optimization Using AWR Software (link is external)
Whitepaper: Load-Pull Analysis for Optimizing PA Performance (link is external)

SPICE Mixed-Signal Simulation
SPICE MIXED-SIGNAL SIMULATION
Realistic Schematic Design Analysis
Perform complete analog and mixed-signal simulation and verification with extensive model libraries, built-in mathematical functions, behavior modeling, and waveform analysis. Realistically model control blocks, motors, sensors, and power converters with electromechanical co-simulation. Determine over-stressed components, maximize design performance, prevent in-field failures, and optimize costs.
- Extensive Model Library and creation
- Built-in mathematical functions
- Waveform viewing and post-processing analysis
- MATLAB Simulink for system-level interfaces
- Determine over-stressed components
- Improve performance, yield, and reliability
Customer Success: Tata Motors Standardizes on PSpice Technology for Automotive Design Simulations

Complete Design Suites
Leverage the full breadth of Cadence technology built to address your specific design requirements.
Sigrity Aurora
Fast, Accurate SI & PI Analysis of your Entire Board
Advanced SI
Serial Link & Parallel Bus (DDR) Signoff & Verification
Advanced PI
Complete Electro-Thermal PDN Signoff and Optimization
EM Extraction
Fast, Accurate, S-Param and Spice Interconnect Model Extraction
Clarity
True Full 3D FEM High Frequency Interconnect Extraction
Celsius
Chip, Package, Board, System Level Thermal Analysis & Signoff
AWR
Full RF Design and Analysis for IC, MMIC, PCB, and Systems
PSpice
Gold standard in SPICE for chip, board, and system analysis