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Posted on Jan 4, 2017
Release 4.2 adds automotive test sources increasing the library size to over 600 bench verified models.
Posted on Dec 30, 2016
When considering what simulation software is right for you some good questions to contemplate are, “can it help me accomplish my objectives and goals?” and “how well can the software help me test my design for failures and maximize my performance without increasing costs?" We may be biased, but our answer to those questions is…PSpice.
Posted on Nov 17, 2016
50% of 'best-in-class' companies connect PCB data to PLM. Learn how organizations benefit from integrating their PLM with PCB and how OrCAD makes integrating the two easy.
Posted on Nov 11, 2016
Sigrity technologists guide you step by step on how to use the Sigrity Finite Difference Time Domain (FDTD) simulator to accurately predict the impact of simultaneous switching noise (SSN) in a system context. A PCB layout is directly connected to a system topology without having to perform an S-parameter extraction. This “FDTD-direct” methodology overcomes the challenge faced by SI engineers who fear accuracy could be compromised when converting an S-parameter to a simplified broadband spice model.
Posted on Nov 4, 2016
According to the AIS (American Institute of Stress), 43 percent of working adults suffer from stress. While stress in the workplace can’t always be avoided, there are a variety of coping techniques which work to minimize its effects—these range from deep breathing and massage therapies, to visual imagery and self-hypnosis. Unfortunately, these coping techniques will not help in addressing component stress.
Posted on Nov 2, 2016
Without DFM Analysis software, issues such as errors in the PCB layout and fabrication complications can create a slower time to market and decreases your productivity.
Posted on Oct 19, 2016
Improving time to market and producing a high quality product is something all designers aim for—creating a need for features and capabilities that boost your PCB layout productivity.
Posted on Oct 7, 2016
Sigrity technologists guide you step by step on how to setup a leadframe package design for accurate extraction using the 3D quasi-static solver engine. Accurate RLC extraction is performed on a leadframe design from the same environment used to model multi-layer packages with other solver engines. Design productivity is improved by enabling a common environment to model leadframe, flip-chip, and wirebond IC Packages.

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