Posted on Oct 7, 2016
Sigrity technologists guide you step by step on how to setup a leadframe package design for accurate extraction using the 3D quasi-static solver engine. Accurate RLC extraction is performed on a leadframe design from the same environment used to model multi-layer packages with other solver engines. Design productivity is improved by enabling a common environment to model leadframe, flip-chip, and wirebond IC Packages.
Posted on Oct 7, 2016
The Raspberry Pi Foundation develops low-cost, high-performance boards that are designed to help people, particularly students, learn programming skills. By putting “the power of digital making into the hands of people all over the world,” the organization strives to increase understanding and shaping of our digital world, enhance problem solving, and equip people for the jobs of the future.
Posted on Sep 30, 2016
After designing the Pspice keyboard shortcut infographic, we realized OrCAD Capture users could benefit from a shortcuts cheat sheet as well. The cheat sheet includes all the common shortcuts Capture users utilize frequently in an easy to read, infographic format.
Posted on Sep 27, 2016
Cadence Sigrity and EMA TimingDesigner have teamed up to provide an fully integrated flow to achieve DDR timing sign-off. Sign-Off with confidence using the industry leading accuracy of Sigrity power-aware simulation with the advanced timing diagram driven visualization and analysis environment of TimingDesigner
Posted on Sep 23, 2016
Filters, amplifiers, linear and switched-mode power supplies, and other analog/mixed-signal designs require rigorous verification and analysis to ensure that they will perform to their design specifications. When violation of component operating limits cause failures, or component value (or parameter) variations lead to yield problems, you could face increased costs, missed schedules, or field failures. Cadence® PSpice® analog and mixed-signal simulator and PSpice Advanced Analysis address these issues, simplifying the complexities of mixed-signal verification, performing “what if” analysis, and validating the complete system check for failures.
Posted on Sep 9, 2016
Allegro Sigrity SI Base and Power-Aware SI Option from Cadence are demonstrated. Sigrity technologists guide you step by step on how to utilize power-aware electric rule checks to confidently fast track the sign off process for your PCB designs.
Posted on Aug 22, 2016
While the SPICE (simulation program with integrated circuit emphasis) kernel is public domain source code and there are many variants out there, not all SPICE is created equal. While most SPICE software can simulate circuits efficiently, choosing a simulation software requires a bit more consideration. The more important question is "will this product fulfill my ultimate business goals?" Meaning, once you have your waveform and simulation, what else might you need to do with it? How well can you analyze the end result, make changes, etc.
Posted on Aug 19, 2016
EMA will show you useful tips and tricks for Cadence PSpice® A/D and why it is the #1 analog simulator in the market today. We will highlight features that will help you achieve fast and accurate results and show you how to maximize the performance of the simulator.
Posted on Aug 12, 2016
With the launch of our FREE PSpice campaign, we decided to look through our archives and compile a list of our most popular PSpice blog posts. So, take a look and make sure you haven't missed any helpful tips or advice from our team of experts.
Posted on Aug 11, 2016
Engineers use a variety of tools and resources to help them evaluate new components for their designs including: demo boards, app notes, co-worker references, FAEs, etc. This process can be tedious and require a lot of work and research to be done outside the standard CAD development environment—most of which cannot be re-used in production.