Input and output characteristics of circuits can be expressed in terms of scattering parameters (s-parameters). By adding two subcircuits, s-parameter data can be printed to the output file or displayed in the Probe window.
With "digital worst-case timing simulation," you are able to use Cadence® PSpice® A/D to evaluate the timing behavior of your digital and mixed analog/digital designs as a function of component propagation delay tolerances.
The “eye” display is frequently used to illustrate the voltage and timing margins present in a system transmitting digital data. This App note will show how to use PSpice Probe's macro feature to generate an "eye" diagram