A simple parallel bus system (SPBS) is one in which data is transferred between components using multiple parallel communication lines, such as DDR4 and DDR5. After completing the setup of the timing budget and analysis options, we can perform circuit simulation and analysis of Simple Parallel Bus System in Topology Explorer. In this video, you’ll learn how to:
- Perform a circuit simulation of DDR4 SPBS using Sigrity System SI
- Analyze the simulation
- Review 2D plots
- Generate and analyze reports
Learn more about how Sigrity can help you simulate and verify interface operation and follow along with the demo files here.
This video is part 9 of a 10-part series:
- Modeling, Simulation, and Analysis of a Simple Parallel Bus System: Part 1
- Modeling, Simulation, and Analysis of a Simple Parallel Bus System: Part 2
- Modeling, Simulation, and Analysis of a Simple Parallel Bus System: Part 3
- Modeling, Simulation, and Analysis of a Simple Parallel Bus System: Part 4
- Modeling, Simulation, and Analysis of a Simple Parallel Bus System: Part 5
- Setting up Timing Budget and Analysis Options for SPBS: Part 1
- Setting up Timing Budget and Analysis Options for SPBS: Part 2
- Setting up Timing Budget and Analysis Options for SPBS: Part 3
- Performing Circuit Simulation and Analysis on SPBS: Part 1
- Performing Circuit Simulation and Analysis on SPBS: Part 2
