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Setting up Timing Budget and Analysis Options for SPBS: Part 3

Learn how to add probes and setup sweep parameters to perform DDR4 analysis in Sigrity.
Duration: 00:05:19

A simple parallel bus system (SPBS) is one in which data is transferred between components using multiple parallel communication lines, such as DDR4 and DDR5. This video will continue to setup timing budget and analysis options for DDR4 SPBS (part 8 of 10). Sigrity allows you to run circuit or channel simulation for a parallel bus system. In this video, we will use Sigrity to:

  • Add voltage and current probe points on DQ signals at different nodes
  • Setup sweep parameters for Propagation delay

Learn more about how Sigrity can help you simulate and verify interface operation and follow along with the demo files here.

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