Resource Library
Posted on Apr 18, 2017
This week’s Working with OrCAD video, Libraries, will showcase the different methods to import a board outline and some general best practices to use when creating board outlines. The video will go over how OrCAD's library management system can help automate many repetitive routines, helping to streamline your design flow.
Posted on Apr 11, 2017
Last week we introduced you to our new video series, Working with OrCAD. This series is designed to walk you through the basics of designing a board within OrCAD PCB Editor from start to finish.
Posted on Apr 5, 2017
Whether you are a new user or current customer our new video series, Working with OrCAD, will walk you through the basics of designing a board within OrCAD PCB Editor from start to finish. We will build a board from start to finish—covering libraries, placement, post-processing, etc.—and include a segment on how our constraint manager can assist you in your design process.
Posted on Mar 27, 2017
Creating various diagram styles within in TimingDesigner to support company-specific formats.
Posted on Mar 27, 2017
Sigrity Integration with TimingDesigner
Posted on Mar 27, 2017
Drawing Basic Timing diagrams. (part 2 of a 3 part series).
Posted on Mar 17, 2017
The integration of Cadence® PSpice® with MathWorks MATLAB and Simulink provides a complete system-level simulation solution for PCB design and implementation. Customers can now utilize PSpice for analog/mixed-signal simulation and perform MATLAB/Simulink behavioral-level modeling, analysis, and visualization in a single, integrated system design and debug environment, improving productivity and accelerating time to market.
Posted on Feb 21, 2017
Stop waiting to be told what parts need to be changed and start selecting orderable, compliant parts upfront with the new OrCAD CIP Compliance Module.
Posted on Jan 31, 2017
Automation sounds good in theory. Think of all the time you could save with auto-routers… if only you could maintain control. That’s what makes auto-interactive routing so powerful. You’re in complete control of the big picture and the important details, but all that stuff in between is taken care of.
Sigrity Tech Tip: How to Test Modules for Automotive Ethernet Compliance Before Building a Prototype
Posted on Jan 10, 2017
Learn more about the Allegro Sigrity SI Base and the System Serial Link Analysis Option from Cadence.
Posted on Dec 19, 2016
The New Allegro PCB Symphony Team Design provides dynamic concurrent PCB team design for multiple PCB designers to work on the same design at the same time without any set-up requirements.
Posted on Dec 6, 2016
Allegro Sigrity SI Base (http://goo.gl/L1k5GX) and the System Serial Link Analysis Option (http://goo.gl/L03MLd) from Cadence are demonstrated.
Posted on Nov 11, 2016
Sigrity technologists guide you step by step on how to use the Sigrity Finite Difference Time Domain (FDTD) simulator to accurately predict the impact of simultaneous switching noise (SSN) in a system context. A PCB layout is directly connected to a system topology without having to perform an S-parameter extraction. This “FDTD-direct” methodology overcomes the challenge faced by SI engineers who fear accuracy could be compromised when converting an S-parameter to a simplified broadband spice model.
Posted on Nov 9, 2016
Eliminate manual tedious and error prone manual part creation. Instead of spending hours manually building PCB symbols and footprints, access millions of parts directly within the OrCAD environment.
Posted on Nov 9, 2016
Stop building parts and start creating products.
Posted on Nov 7, 2016
See how the Allegro 17.2-2016 PCB design software handles the unique challenges associated with rigid-flex designs.
Posted on Oct 20, 2016
Ensure your parts will be correct, available, and in compliance with access to deep supply chain insights available across 300+ million devices.
Posted on Oct 7, 2016
Sigrity technologists guide you step by step on how to setup a leadframe package design for accurate extraction using the 3D quasi-static solver engine. Accurate RLC extraction is performed on a leadframe design from the same environment used to model multi-layer packages with other solver engines. Design productivity is improved by enabling a common environment to model leadframe, flip-chip, and wirebond IC Packages.
Posted on Sep 30, 2016
OrCAD PCB Productivity Toolbox provides a comprehensive suite of utilities to help PCB designers to increase PCB layout productivity. This short video will show you a selection of features including Label Tune, Barcode, Polar Grid and Post Processing.
Posted on Sep 30, 2016
OrCAD DFM Checker provides comprehensive PCB manufacturing analysis, Hierarchical Rule-Set-Driven-Analysis, and Error Charts.