Resource Library
Posted on Aug 27, 2019
Learn how to effectively drive design success without driving yourself crazy in this webinar from the experts at EMA
Posted on Jul 11, 2019
During design the only constant is change. See how OrCAD provides real-time revision control and file management to ensure you are always working on the latest and greatest and always have access to your file history when needed.
Posted on May 24, 2019
Ensuring consistency with multiple engineers for all your designs can be an overwhelming task. With OrCAD Engineering Data Management, you can now include your company’s templates as part of generating a new data-managed project. By including templates in OrCAD Engineering Data Management, you can eliminate the need for design set up and create a standard format for you company’s designs, increasing consistency and productivity throughout your entire design team.
Posted on May 24, 2019
Preparing your design drawing data can be a tedious and time-consuming task, often prone to typos and errors. With OrCAD Engineering Data Management, you can now transfer this pertinent design meta data automatically into the drawing format’s Title block for both your schematic AND PCB designs.
Posted on May 24, 2019
Properly executing the generation of manufacturing data is vital to the success of your board. OrCAD Engineering Data Management makes this process quick and error-free with the new Package for Release feature. Automatically generate all the necessary documents for manufacturing during the check in of your design; ensuring you have all the necessary files needed for manufacturing at the correct revision. Streamline your design and manufacturing process by easily autogenerating the necessary manufacturing files and ensuring the correct revision is sent to production with Package for Release in OrCAD EDM.
Posted on May 3, 2019
New part creation can be time consuming and error-prone, OrCAD makes it simple without ever leaving your CAD environment with real-time part data.
Posted on Mar 18, 2019
BOM denied. Redesign required. Dreaded words to any engineering team. Obsolete parts, RoHS / REACH compliance issues, inadequate stock, almost every engineer has been bitten by one of these issues at some point. Fortunately, it doesn’t have to be this way. Join EMA Design Automation and SiliconExpert to learn about the common causes of BOM rejection and how to prevent these issues in the future. As they say an ounce of prevention is worth a pound of cure.
Posted on Feb 27, 2019
With all the pressures engineers face to make everything ‘better, faster, cheaper, smaller’ all in less time managing your design data can seem like the least of your concerns. However, data management issues can sink a project just as fast as any design flaw. Effectively managing your design data is a critical piece to ensuring overall project success. Get critical design data management tips and best practices learned the hard way so you don’t have to from the experts at EMA and xPLM.
Posted on Jan 25, 2019
Curious to what a day in the life of an OrCAD Capture is like? Watch this video to see a typical workflow.
Posted on Nov 20, 2018
An overview of BER Analysis for DDR4 Interfaces with SystemSI
Posted on Nov 2, 2018
Connect with the world's leading manufacturers to easily request and implement custom manufacturability rules. Learn more.
Posted on Nov 2, 2018
Double check your DFM rules before signoff with a forced batch check of all rules for your whole design. If you do find something awry, it’s easy to locate and fix in your design.
Posted on Nov 2, 2018
Double check your DFM rules before signoff with a forced batch check of all rules for your whole design. If you do find something awry, it’s easy to locate and fix in your design.
Posted on Nov 2, 2018
Easily ensure test points are accessible in your designs.
Posted on Nov 2, 2018
Check for common copper and component spacing issues that could potentially derail manufacturing and cause a respin.
Posted on Nov 2, 2018
Easily create and assign constraints for manufacturing based on IPC standards and common PCB rules.
Posted on Nov 2, 2018
Remove unused sections of plated through holes in high-speed designs to improve signal integrity on your designs.
Posted on Nov 2, 2018
Measure from true signal origin to end point through vias and through packages, not just the etch, so you can get timing right and ensure signal performance.
Posted on Nov 2, 2018
Visual indicators of length constraints help you meet delay propagation and total etch length goals when placing components.
Posted on Nov 2, 2018
Real-time interactive checks help you easily find and fix common route quality issues that manufacturing DRC signoff checks miss.