Every signal current has an accompanying return current that ideally travels directly under the signal trace, usually through a continuous reference plane such as a ground or power plane. This tight coupling keeps loop inductance low and helps maintain signal integrity. In high-speed designs, properly managing these return paths is crucial for signal integrity, power integrity, and overall PCB performance.
What is a Return Path Discontinuity?
A return path discontinuity is an interruption or change in the ideal path that return currents would normally follow. Any voids or discontinuities in the layer directly below a high-speed or high-frequency signal trace can cause return path discontinuities, which can be perceived as impedance discontinuities. These discontinuities can severely degrade signal integrity and contribute to issues such as signal distortion through increased electromagnetic interference (EMI), signal reflections, and crosstalk.
How to Identify Return Path Discontinuities
To identify return path discontinuities, you must first analyze the quality of the return path through the Return Path Quality Factor, often abbreviated to RPQF or simply Quality Factor. The Quality Factor is defined as the loop inductance of a return path over the ideal loop inductance of that path:
While there is no “best” value or threshold for measuring quality factor, the ideal value is 1. A quality factor closer to 1 indicates low loop inductance compared to reference. A higher quality factor indicates more return path loop inductance, which could indicate discontinuity.
Issues and discontinuities in return paths are difficult to identify. With this “hidden” path, you can find yourself chasing symptoms without seeing the cause- unless proper tools are utilized. Simulation can be used to visualize the return path and quickly pinpoint issues. In simulation, the return path of a signal can be visualized on a PCB design by plotting the current density. The return path of the signal has its highest current density directly under the trace. If the current density disperses or is no longer under the signal trace, a discontinuity has occurred.
Common Causes of Return Path Discontinuities
Return path discontinuities can arise from various factors throughout the PCB layout. The table below will help to identify the causes of return path discontinuities, why the PCB feature effects signal and power quality, and a solution to help PCB designers identify and optimize power delivery.
| Cause | Problem | Solution |
|---|---|---|
| Inadequate Decoupling Capacitors | When a signal references a power plane on one layer and a ground plane on another without proper decoupling capacitors, the return current must go through a longer path to find a common return, causing delay and noise. | Optimize decoupling capacitors. |
| Stackup Design | Return current may take a longer high-impedance path if there is no solid ground or power plane directly beneath the signal layer. | Optimize the PCB stackup. |
| Via Transitions | If a signal switches layers and the new layer doesn’t have the same reference plane nearby, the return current must take a longer path. | Optimize via locations. |
| Long Trace Lengths | The longer the trace length the larger the loop which can act like antennas and radiate EMI. | Develop a routing strategy. |
| Split or Incontiguous Planes | When a signal crosses over a void, split, or cutout in a ground or power plane, the return current can’t follow directly beneath the trace. | Use solid ground planes. |
Understanding the Impacts of Return Path Discontinuities
Return path discontinuities can affect overall system performance and have several negative effects on power quality including the following common power integrity issues:
- Signal Degradation
A return path discontinuity results in changes in the impedance which can cause signal reflections, ringing, overshoot, undershoot, and data corruption.
- Increased Radiated Emissions (EMI)
Larger loops can act like antennas, radiating EMI and potentially causing a product to fail EMC compliance tests.
- Crosstalk
When a discontinuity occurs in the return path, the current strays into unintended paths such as nearby traces. This can increase coupling between traces and create noise or timing errors in adjacent signals.
- Ground Bounce
In fast signal transitions, high inductance, typically seen in reference plane changes without proper decoupling capacitors, can result in ground bounce. This can lead to data errors and incorrect operation.
- Power Integrity Issues
Return path discontinuities can force the return current through power planes or shared paths. This can inflict noise on the power delivery network (PDN), degrading voltage stability.
- Timing Errors
Signals traveling along longer return paths can experience additional inductance and delays. This can cause skew and timing mismatches which are problematic for high-speed buses such as DDR, PCIe, and/or USB.
To prevent these issues, PCB designers must try to create a stable and reliable power delivery network through mitigation strategies for return path discontinuities.
Effective Mitigation Strategies for Return Path Discontinuities
Return path discontinuities must be addressed to improve power quality in your designs, ideally during the PCB design process when change is easiest to implement. To eliminate return path discontinuities, the following strategies can be utilized:
1. Incorporate Solid Ground Planes
Allocate entire layers to ground planes to provide low impedance return paths. Ensure these ground planes are continuous and free of gaps or splits as crossing a split in a ground plane can create impedance discontinuities and increase EMI.
- Keep Reference Planes Continuous
- Avoid Routing Over Split Planes
2. Optimize Decoupling Capacitors
Place decoupling capacitors close to power pins of ICs to provide local return paths and filter noise. Optimize placement by placing decoupling capacitors evenly across the PCB to ensure effective power delivery and return paths.
- Place Decoupling Capacitors Close to ICs
- Place Decoupling Capacitors Close to Plane Changes
- Distribute Decoupling Capacitors Evenly
3. Develop a Routing Strategy
Route signal traces close to their return paths to minimize loop area and inductive coupling. For high-speed signals, use differential pairs to ensure balanced and close return paths. Avoid routing over voids, splits, or slots in return planes as the return current cannot follow directly under the signal and will detour around the split- increasing loop area and causing EMI.
- Minimize Loop Area
- Use Differential Pair Routing
- Avoid Crossing Voids, Splits, or Slots in Return Planes
4. Optimize the Stackup
Keep power and ground planes adjacent to signal layers to minimize the distance to the plane. This will keep the signal and return path tightly coupled, create a low impedance path, maintain signal integrity.
- Keep Reference Planes Adjacent to Signal Layers
5. Optimize Via Usage
Ensure vias used for signal transitions are near return vias to provide a low-impedance return path. Also ensure that ground planes on different layers are connected with via arrays. If a split ground plane is unavoidable or signals cross layers, use stitching vias to maintain a consistent return path.
- Place Return Vias Near Signal Transitions
- Utilize Stitching Vias As Needed
Implementing these mitigation strategies throughout the PCB design process can result in many benefits and allow you to set the design up for success. But identifying power delivery issues in the design may be difficult and time-consuming which leads to the question- how do you know when and where to deploy these mitigation strategies?
Incorporating Simulation
To ensure a continuous return path, simulation can be deployed to quickly evaluate return paths and identify discontinuities. Simulation tools typically calculate and validate return paths based on the PCB layout and can be used to analyze power integrity and identify return path discontinuities created by:
- Changes in reference planes
- Gaps or splits in reference planes
- Via transitions
Once these issues are identified, mitigation strategies can be incorporated into the PCB design to improve return paths and in turn the power delivery network.
Why Should You Analyze Return Path?
Analyzing return paths and implementing mitigation strategies to eliminate discontinuities will improve overall PDN performance. Performing return path analysis can benefit your PBC design and enable designers to:
- Improving Power Integrity
Return path analysis can be used to create a proper, continuous return path. This minimizes noise and voltage drops across the ground plane and creates a stable power delivery network.
- Create a Continuous Path to Ground
Gaps and splits in ground or power planes can interrupt the return path. This can cause:
- Increased EMI
- Crosstalk
- Signal Reflections
Minimizing these issues by creating a continuous return path can minimize data corruption and signal integrity issues.
- Minimize Ground Bounce and Noise
When high-speed signals switch simultaneously, it can create voltage fluctuations in the ground plane, commonly referred to as ground bounce. This can lead to noise and signal integrity problems, especially in digital circuits. A robust return path can minimize the ground bounce and improve signal quality.
- Optimize Via Placement
If vias are placed far from signal traces, it can create longer, indirect return paths, thus increasing inductance and EMI. Return path analysis can be used to optimize via placement to create a continuous and direct return path.
- Minimize Impedance Discontinuities
Signals switching from one reference plane to another can cause impedance discontinuities. Analyzing the return path can help pinpoint reference plane switching and create a continuous return path with consistent impedance.
- Reduce Troubleshooting Time
Identifying exactly what is causing signal integrity and power integrity issues can be difficult and time consuming. Analyzing return path during the PCB layout can help identify issues quickly and minimize the time spent troubleshooting in the lab.
Performing return path analysis at any stage of the design is going to yield benefits but having this as the last step in your design process can result in late-stage design changes, additional rework, and more design hours if any issues are found. Identifying return path discontinuities throughout the PCB layout will allow you to optimize your PDN design and ensure adequate and reliable power delivery- this is where Sigrity Aurora can help.
Analyzing Return Path Discontinuities with Sigrity
Sigrity Aurora includes easy-to-use workflows that step you through the required procedure to analyze signal and power integrity in your PCB designs. The Return Path Workflow in Sigrity Aurora is most commonly used to analyze return paths, providing a step-by-step procedure to perform layout-based return path analysis directly within the PCB layout canvas. The Return Path workflow can be used by PCB designers throughout the PCB layout process to identify and correct issues when change is easiest, reducing time spent on prototyping, troubleshooting, and redesigning the PCB. Sigrity Aurora streamlines the product development process and allows you to efficiently analyze return paths with:
- A unified environment for PCB design, signal integrity analysis, and power integrity analysis
- Easy-to-use workflows
- Minimal setup and modeling
- Visual overlays directly on the PCB canvas with color-coded results
- Detailed, tabular results to easily pinpoint return path discontinuities
Learn more about return path discontinuities and how to resolve common signal integrity and power integrity issues using Sigrity Aurora with our free course: Introduction to In-Design SI/PI analysis with Sigrity Aurora.
