Posted on Jun 13, 2016
Ideally what engineers want is a blend of virtual and physical prototyping—something possible in PSpice. Since many IoT innovators use inexpensive development boards to develop their idea, I thought it would be instructive to show how one can develop new hardware in OrCAD® and PSpice, then integrate the simulation with real sensors driven by an Arduino board.
Posted on Jun 10, 2016
Learn how PSpice SLPS enables co-simulation for complete system model for test and verification and helps identify errors early in the design process.
Posted on Jun 10, 2016
Automotive parts manufacturer Hyundai MOBIS was facing electromagnetic interference (EMI) problems with its PCB designs. In this short video clip, Imran Shaik, a project lead on EMI simulations, discusses how Cadence® Sigrity™ PowerSI™ and Cadence Sigrity SPEED2000™ helped the company reduce its PCB testing time and get its products to market faster.
Posted on Jun 9, 2016
See how you can use PSpice to quickly and effectively test your design across 1,000's of different configurations before ever committing to hardware with virtual prototyping.
Posted on Jun 8, 2016
See how PSpice Advanced Analysis takes simulation to the next level to help you optimize your designs while improving reliability, predictability, yield, and cost.
Posted on Jun 2, 2016
Industry first bi-directional interface between OrCAD and Arena PLM enables OrCAD to automatically upload information from Arena PLM seamlessly while working in the OrCAD solution
Posted on Jun 1, 2016
Optimizing IR drop, OneStor Solutions group, CSES, Bangalore, Goutham, Shashi & Subbu
Posted on May 23, 2016
See what's new in OrCAD 17.2
Posted on May 20, 2016
Found yourself trying to remember what changed between revisions of a design only to be forced to perform a tedious and often error prone visual inspection of the two designs? The new graphical design compare function in OrCAD 17.2-2016 makes it easy to quickly identify what changed between design revisions.
Posted on May 17, 2016
CircuitSpace enables a flexible design reuse environment with the ability to define and save reuse templates that can be mapped to existing circuitry on the same design or in an entirely new design even if the logic does not exactly match or the board stack up has changed.