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Posted on Nov 2, 2018
Easily ensure test points are accessible in your designs.
Posted on Nov 2, 2018
Check for common copper and component spacing issues that could potentially derail manufacturing and cause a respin.
Posted on Nov 2, 2018
Easily create and assign constraints for manufacturing based on IPC standards and common PCB rules.
Posted on Nov 2, 2018
Remove unused sections of plated through holes in high-speed designs to improve signal integrity on your designs.
Posted on Nov 2, 2018
Measure from true signal origin to end point through vias and through packages, not just the etch, so you can get timing right and ensure signal performance.
Posted on Nov 2, 2018
Visual indicators of length constraints help you meet delay propagation and total etch length goals when placing components.
Posted on Nov 2, 2018
Real-time interactive checks help you easily find and fix common route quality issues that manufacturing DRC signoff checks miss.
Posted on Oct 24, 2018
Posted on Oct 10, 2018
Posted on Jul 31, 2018
Manually adding fillets and teardrops can add weeks to your design. And allowing a board house to add them after design completion, will leave you unaware of effects on your board. By automating this process and adhering to predefined constraint rules, you can save time and ensure your design intent is unchanged. OrCAD helps you do this with Dynamic Shape Fillets. Simply set the required parameters for the teardrops or fillets. Highlight the selection of pins or vias and OrCAD PCB Designer automatically creates the shapes.

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