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Posted on May 26, 2016
Learn why Compology selected OrCAD as their PCB design tool of choice to help them shake up the garbage collection industry.
Posted on May 24, 2016
As we mentioned in our previous post, Cadence announced new capabilities for OrCAD with its release of the 17.2 update. Among some of the newer features of this release is the new design compare function.
Posted on May 20, 2016
Found yourself trying to remember what changed between revisions of a design only to be forced to perform a tedious and often error prone visual inspection of the two designs? The new graphical design compare function in OrCAD 17.2-2016 makes it easy to quickly identify what changed between design revisions.
Posted on May 11, 2016
On Tuesday, May 3rd, Cadence Design Systems, Inc. announced new capabilities for OrCAD® 17.2-2016 which addresses challenges with flex and rigid-flex design as well as mixed-signal simulation complexities in IoT, wearables, and wireless mobile devices. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.
Posted on May 6, 2016
OrCAD 17.2-2016 release is here. See what is new in OrCAD Capture.
Posted on Apr 28, 2016
In PCB design, designers are being tasked to do more with less time. Implementing the correct workflows and tools from the beginning are some of the easiest ways help mitigate this issue.
Posted on Apr 18, 2016
Learn how Solid State Logic, a leading manufacturer of professional grade audio mixing solutions, used PSpice to prevent re-spins and avoid unnecessary late stage design changes.
Posted on Feb 24, 2016
Last week, Cadence announced OrCAD® Capture now provides export capability for Intel Schematic Connectivity Format (ISCF), targeted at automating Intel-based design reviews. ISCF was developed by Intel to streamline the collaboration process with its customers. Intel Schematic Compatibility Format (ISCF) provides a simple, clean schematic data exchange between design vendors and Intel Schematic Checking team for the schematic review process.

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